Design and verification of I3C controller IP on SoC chip
Ruan Yupeng1,，Liu Wei1,，2，3,，4
(School of Physics and Technology,， Wuhan U(1.School of Physics and Technology， Wuhan University,， Wuhan 430072,， China；2.School of Microelectronics,， Wuhan University,， Wuhan 430072， China,；3.Hubei Luojia Laboratory,， Wuhan 430072， China,；4.Wuhan Institute of Quantum Technology,， Wuhan 430072， China)niversity， Wuhan 430072,， China)
Abstract： This article presents the design and verification of an I3C controller IP that can be configured with an APB bus. I3C, which stands for Improved Inter Integrated Circuit, is a new serial communication module that is used as a peripheral IP module in System-on-Chip (SoC) designs. Compared to I2C, I3C supports new communication modes, higher communication speeds (up to 12.5 MHz), dynamic address allocation, and built-in interrupts (IBI). These features make I3C significantly advantageous over I2C and its large-scale popularity and commercial use is a future trend. This article first introduces the basic principles and advantages of the I3C protocol and then describes the design architecture and functional modules of the I3C controller in detail. After completing the design, the I3C controller was functionally verified, and its verification results were demonstrated, proving the effectiveness and reliability of the proposed method.
Key words : I3C controller,；arbitration mechanism；general command code,；dynamic address allocation
【引言】
I2C （Inter-Integrated Circuit）接口是一種廣泛應用于集成電路領域的串行通信協(xié)議,，它可以將多個設備連接到同一條總線上，特別適用于嵌入式系統(tǒng)和其他需要少量設備通信的應用,。然而,，隨著行業(yè)的發(fā)展，移動無線和受移動影響的產品中傳感器的數(shù)量激增,，這給設計者帶來了巨大的挑戰(zhàn),，因為沒有一致的物理傳感器接口方法，使得傳感器的接口設計變得更加復雜和多樣化,，從而影響了系統(tǒng)的性能和可靠性,。設備和平臺設計人員面臨著來自各種數(shù)字接口的挑戰(zhàn)，包括但不限于I2C,、SPI和UART等[1],。例如I2C速率低、功耗大的短板日趨明顯,，為了增強I2C的性能,，MIPI將I3C (Improved Inter Integrated Circuit)接口標準作為I2C協(xié)議的演進。MIPI聯(lián)盟是一個由ARM,、諾基亞,、意法半導體和德州儀器等公司于2003年發(fā)起成立的國際組織，旨在為移動應用處理器提供一個開放的標準和規(guī)范,，以降低設計復雜度和成本,，提高設計靈活性和效率，并為此制定了一套完整的接口標準[2-4],。
